Raspberry Pi 5 Official M.2 HAT+ M Key PCIe to NVMe SSD Expansion Board (2230/2242, 3A, LEDs)

Overview

The Raspberry Pi 5 Official M.2 HAT+ Series is a PCIe to M.2 SSD expansion board designed for Raspberry Pi 5. It connects M.2 peripherals such as NVMe drives and other PCIe accessories to Raspberry Pi 5’s PCIe interface by converting the Raspberry Pi 5 PCIe connector to a single M.2 M key edge connector. It follows the Raspberry Pi HAT+ specification and includes on-board EEPROM to save the HAT ID and product information, supporting automatic detection in Raspberry Pi OS.

Key Features

• Single-lane PCIe 2.0 interface (500 MB/s peak transfer rate)
• Supports Gen2/Gen3 mode (stated for the M.2 NVMe protocol use case)
• Supports devices using the M.2 M key edge connector (PCIe / NVMe SSD use case)
• SSD form-factor support:
  • M.2 HAT+ Standard: 2230 / 2242
  • M.2 HAT+ Compact: 2230 only
• Supplies up to 3A to connected M.2 devices
• On-board dual LED indicator lights:
  • PWR: keep on when powered on
  • ACT status indicator light: flashing when reading and writing data on the hard drive
• Active cooling module can be installed (only for the Standard version)
• Support for stacking with Raspberry Pi 5
• Gold-plated anti-oxidation process
• Compliant with HAT+ standards

Specifications

Mechanical Dimensions (M.2 HAT+ Standard; unit: mm)

Compatibility Notes

• Standard Kit: supports 2230/2242 SSDs and the official Active Cooler; it does not support the official Raspberry Pi 5 case.
• Compact Kit: supports 2230 SSDs and the official Raspberry Pi 5 case; it does not support the Raspberry Pi 5 active heat sink.
• The included threaded spacers provide room to fit the Raspberry Pi Active Cooler beneath an M.2 HAT+.
• Use in the Raspberry Pi Case for Raspberry Pi 5 requires removing the lid and the included fan.

For help selecting the Standard vs Compact version for a specific Raspberry Pi 5 build, contact support@rcdrone.top or visit https://rcdrone.top/.

Reference Performance Data (as provided)

• Official data: Raspberry Pi Gen2 mode theoretical bandwidth: 5Gbps; Raspberry Pi Gen3 mode theoretical bandwidth: 8Gbps
• Note shown: 8Gigatransfer = 1 Gigabyte = 1000 Megabytes (1000MB/sec)
• SD Mode: 105Mbps
• Example test output:
  • SD card data transmission test: 75.32 MB/sec
  • M.2 NVMe data transmission test: 777.93 MB/sec
• The actual measured data is for reference only due to various factors.

SSD Startup Operation Method (Reference)

1. To modify the boot information, enter the following command:
   sudo rpi-eeprom-config --edit
   Modify BOOT_ORDER to: BOOT_ORDER=0xf416
   Enable PCIE.PROBE: PCIE.PROBE=1
   Then save, exit, and restart.
2. Open the terminal in the nvme system, enter the following command:
   sudo rpi-eeprom-config --edit
sudo apt update
sudo apt install rpi imager
   Then, click on the Raspberry Pi icon on the desktop -> Accessories -> Imager to install the system into the nvme solid state.

Manuals / Tutorial

Tutorial link: https://www.yahboom.net/study/M.2-HAT+

Details

Add fast NVMe storage to Raspberry Pi 5 using the official M.2 HAT+ (M‑key) in Standard or Compact form.

HAT+ compliant design supports PCIe NVMe storage, stacking, and a gold‑plated anti‑oxidation finish.

The Standard kit supports 2230/2242 NVMe SSDs and allows room for the official Active Cooler under the board.

The Compact version is designed to fit the official Raspberry Pi 5 case while supporting a 2230 NVMe drive.

Choose Standard for 2230/2242 SSD compatibility, or Compact when you only need 2230 and case fit is a priority.

Boot-from-SSD setup is handled in Raspberry Pi OS by adjusting BOOT_ORDER and enabling PCIe probing.

On-board EEPROM stores HAT ID data for automatic detection in Raspberry Pi OS.

Built-in PWR and ACT LEDs make it easy to confirm power and NVMe read/write activity at a glance.

Installation uses the Raspberry Pi 5 PCIe connector with the included ribbon cable, spacers, and mounting screws.

Both versions include the board and mounting hardware; the Standard kit also includes the PCIe ribbon cable and pin header.